%0 Conference Paper %1 conf/date/VianaBRAA04 %A Viana, Pablo %A Barros, Edna %A Rigo, Sandro %A Azevedo, Rodolfo %A Araujo, Guido %B DATE %D 2004 %I IEEE Computer Society %K %P 734-735 %T Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology. %U http://dblp.uni-trier.de/db/conf/date/date2004-1.html#VianaBRAA04 %@ 0-7695-2085-5

@inproceedings{conf/date/VianaBRAA04, added-at = {2023-12-12T17:18:53.000+0100}, author = {Viana, Pablo and Barros, Edna and Rigo, Sandro and Azevedo, Rodolfo and Araujo, Guido}, biburl = {https://www.bibsonomy.org/bibtex/28accba89f341f0994c1662dbf2fdac1d/admin}, booktitle = {DATE}, crossref = {conf/date/2004}, ee = {http://dl.acm.org/citation.cfm?id=969012}, interhash = {01e29bb5011a12eb4de03b176f3c52be}, intrahash = {8accba89f341f0994c1662dbf2fdac1d}, isbn = {0-7695-2085-5}, keywords = {}, pages = {734-735}, publisher = {IEEE Computer Society}, timestamp = {2023-12-12T17:18:53.000+0100}, title = {Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology.}, url = {http://dblp.uni-trier.de/db/conf/date/date2004-1.html#VianaBRAA04}, year = 2004 }