%0 Conference Paper %1 conf/vlsic/ZeinolabedinDJS16 %A Zeinolabedin, Seyed Mohammad Ali %A Do, Anh-Tuan %A Jeon, Dongsuk %A Sylvester, Dennis %A Kim, Tony Tae-Hyoung %B VLSI Circuits %D 2016 %I IEEE %K dblp %P 1-2 %T A 128-channel spike sorting processor featuring 0.175 µW and 0.0033 mm2 per channel in 65-nm CMOS. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2016.html#ZeinolabedinDJS16 %@ 978-1-5090-0635-9

@inproceedings{conf/vlsic/ZeinolabedinDJS16, added-at = {2023-03-21T00:00:00.000+0100}, author = {Zeinolabedin, Seyed Mohammad Ali and Do, Anh-Tuan and Jeon, Dongsuk and Sylvester, Dennis and Kim, Tony Tae-Hyoung}, biburl = {https://www.bibsonomy.org/bibtex/2c42f3922e26802ae120285b6716163be/dblp}, booktitle = {VLSI Circuits}, crossref = {conf/vlsic/2016}, ee = {https://doi.org/10.1109/VLSIC.2016.7573467}, interhash = {0787bf067800cf6cbbff06949a5bc21e}, intrahash = {c42f3922e26802ae120285b6716163be}, isbn = {978-1-5090-0635-9}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2024-04-10T15:34:06.000+0200}, title = {A 128-channel spike sorting processor featuring 0.175 µW and 0.0033 mm2 per channel in 65-nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2016.html#ZeinolabedinDJS16}, year = 2016 }