Please log in to take part in the discussion (add own reviews or comments).
Cite this publication
More citation styles
- please select -
%0 Journal Article
%1 journals/jssc/HagleitnerBRLWC07
%A Hagleitner, Christoph
%A Bonaccio, Anthony R.
%A Rothuizen, Hugo E.
%A Lienemann, Jan
%A Wiesmann, Dorothea
%A Cherubini, Giovanni
%A Korvink, Jan G.
%A Eleftheriou, Evangelos
%D 2007
%J IEEE J. Solid State Circuits
%K dblp
%N 8
%P 1779-1789
%T Modeling, Design, and Verification for the Analog Front-End of a MEMS-Based Parallel Scanning-Probe Storage Device.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc42.html#HagleitnerBRLWC07
%V 42
@article{journals/jssc/HagleitnerBRLWC07,
added-at = {2021-10-14T00:00:00.000+0200},
author = {Hagleitner, Christoph and Bonaccio, Anthony R. and Rothuizen, Hugo E. and Lienemann, Jan and Wiesmann, Dorothea and Cherubini, Giovanni and Korvink, Jan G. and Eleftheriou, Evangelos},
biburl = {https://www.bibsonomy.org/bibtex/22e9967a2c6884e04d7363f22c2561d51/dblp},
ee = {https://doi.org/10.1109/JSSC.2007.900287},
interhash = {0bb18227b2d91bb9c664ef68f44dfced},
intrahash = {2e9967a2c6884e04d7363f22c2561d51},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 8,
pages = {1779-1789},
timestamp = {2024-04-08T10:43:52.000+0200},
title = {Modeling, Design, and Verification for the Analog Front-End of a MEMS-Based Parallel Scanning-Probe Storage Device.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc42.html#HagleitnerBRLWC07},
volume = 42,
year = 2007
}
