%0 Conference Paper %1 conf/isvlsi/XieLWDSGP14 %A Xie, Qing %A Lin, Xue %A Wang, Yanzhi %A Dousti, Mohammad Javad %A Shafaei, Alireza %A Ghasemi-Gol, Majid %A Pedram, Massoud %B ISVLSI %D 2014 %I IEEE Computer Society %K dblp %P 424-429 %T 5nm FinFET Standard Cell Library Optimization and Circuit Synthesis in Near-and Super-Threshold Voltage Regimes. %U http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2014.html#XieLWDSGP14 %@ 978-1-4799-3763-9

@inproceedings{conf/isvlsi/XieLWDSGP14, added-at = {2023-03-24T00:00:00.000+0100}, author = {Xie, Qing and Lin, Xue and Wang, Yanzhi and Dousti, Mohammad Javad and Shafaei, Alireza and Ghasemi-Gol, Majid and Pedram, Massoud}, biburl = {https://www.bibsonomy.org/bibtex/28916d66b40458867aa9d115db6dd26d8/dblp}, booktitle = {ISVLSI}, crossref = {conf/isvlsi/2014}, ee = {https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2014.101}, interhash = {0d381046236b77c5b80995a74c60638b}, intrahash = {8916d66b40458867aa9d115db6dd26d8}, isbn = {978-1-4799-3763-9}, keywords = {dblp}, pages = {424-429}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T11:07:29.000+0200}, title = {5nm FinFET Standard Cell Library Optimization and Circuit Synthesis in Near-and Super-Threshold Voltage Regimes.}, url = {http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2014.html#XieLWDSGP14}, year = 2014 }