%0 Conference Paper %1 conf/dac/KimVRR16 %A Kim, Younghoon %A Venkataramani, Swagath %A Roy, Kaushik %A Raghunathan, Anand %B DAC %D 2016 %I ACM %K dblp %P 15:1-15:6 %T Designing approximate circuits using clock overgating. %U http://dblp.uni-trier.de/db/conf/dac/dac2016.html#KimVRR16 %@ 978-1-4503-4236-0

@inproceedings{conf/dac/KimVRR16, added-at = {2021-10-14T00:00:00.000+0200}, author = {Kim, Younghoon and Venkataramani, Swagath and Roy, Kaushik and Raghunathan, Anand}, biburl = {https://www.bibsonomy.org/bibtex/27b02e39ba46536db6474b96fc4fd39c8/dblp}, booktitle = {DAC}, crossref = {conf/dac/2016}, ee = {https://doi.org/10.1145/2897937.2898005}, interhash = {0d68401cd7536acaabbf856eb01662e0}, intrahash = {7b02e39ba46536db6474b96fc4fd39c8}, isbn = {978-1-4503-4236-0}, keywords = {dblp}, pages = {15:1-15:6}, publisher = {ACM}, timestamp = {2024-04-10T06:55:10.000+0200}, title = {Designing approximate circuits using clock overgating.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2016.html#KimVRR16}, year = 2016 }