Inproceedings,
A novel soft error tolerant FPGA architecture.
M. Amagasaki, Y. Nakamura, T. Teraoka, M. Iida, and T. Sueyoshi.VLSI-SoC, page 1-6. IEEE, (2016)
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- conf/vlsi/AmagasakiNTIS16
- entry type
- inproceedings
- booktitle
- VLSI-SoC
- year
- 2016
- pages
- 1-6
- publisher
- IEEE
- crossref
- conf/vlsi/2016soc
- ee
- https://doi.org/10.1109/VLSI-SoC.2016.7753574
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- 978-1-5090-3561-8
- url
- http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2016.html#AmagasakiNTIS16
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%1 conf/vlsi/AmagasakiNTIS16
%A Amagasaki, Motoki
%A Nakamura, Yuji
%A Teraoka, Takuya
%A Iida, Masahiro
%A Sueyoshi, Toshinori
%B VLSI-SoC
%D 2016
%I IEEE
%K dblp
%P 1-6
%T A novel soft error tolerant FPGA architecture.
%U http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2016.html#AmagasakiNTIS16
%@ 978-1-5090-3561-8
@inproceedings{conf/vlsi/AmagasakiNTIS16,
added-at = {2017-05-24T00:00:00.000+0200},
author = {Amagasaki, Motoki and Nakamura, Yuji and Teraoka, Takuya and Iida, Masahiro and Sueyoshi, Toshinori},
biburl = {https://www.bibsonomy.org/bibtex/27fa311e3d6e27189db0caa4e197485e6/dblp},
booktitle = {VLSI-SoC},
crossref = {conf/vlsi/2016soc},
ee = {https://doi.org/10.1109/VLSI-SoC.2016.7753574},
interhash = {0ea737b3507d9e993ed685dc22aaeeb7},
intrahash = {7fa311e3d6e27189db0caa4e197485e6},
isbn = {978-1-5090-3561-8},
keywords = {dblp},
pages = {1-6},
publisher = {IEEE},
timestamp = {2019-10-17T14:01:58.000+0200},
title = {A novel soft error tolerant FPGA architecture.},
url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2016.html#AmagasakiNTIS16},
year = 2016
}