%0 Journal Article %1 journals/tcad/RamprasathV14 %A Ramprasath, S. %A Vasudevan, Vinita %D 2014 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 5 %P 717-727 %T Statistical Criticality Computation Using the Circuit Delay. %U http://dblp.uni-trier.de/db/journals/tcad/tcad33.html#RamprasathV14 %V 33

@article{journals/tcad/RamprasathV14, added-at = {2023-12-05T00:00:00.000+0100}, author = {Ramprasath, S. and Vasudevan, Vinita}, biburl = {https://www.bibsonomy.org/bibtex/286ddb28fdb5dd3f5ccba596e75536a02/dblp}, ee = {https://doi.org/10.1109/TCAD.2013.2296436}, interhash = {0051d5b8ec00decbaac57305ad4e45ec}, intrahash = {86ddb28fdb5dd3f5ccba596e75536a02}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 5, pages = {717-727}, timestamp = {2024-04-08T19:47:24.000+0200}, title = {Statistical Criticality Computation Using the Circuit Delay.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad33.html#RamprasathV14}, volume = 33, year = 2014 }