%0 Journal Article %1 journals/integration/RioGSBB16 %A del Rio, David %A Gurutzeaga, Iñaki %A Solar, Héctor %A Beriain, Andoni %A Berenguer, Roc %D 2016 %J Integr. %K dblp %P 208-216 %T Layout-aware design methodology for a 75 GHz power amplifier in a 55 nm SiGe technology. %U http://dblp.uni-trier.de/db/journals/integration/integration52.html#RioGSBB16 %V 52

@article{journals/integration/RioGSBB16, added-at = {2020-02-20T00:00:00.000+0100}, author = {del Rio, David and Gurutzeaga, Iñaki and Solar, Héctor and Beriain, Andoni and Berenguer, Roc}, biburl = {https://www.bibsonomy.org/bibtex/2e823412a57dde3f925a01190e2c129b0/dblp}, ee = {https://doi.org/10.1016/j.vlsi.2015.07.010}, interhash = {0bd1c0665baf145a037dc715cc97606a}, intrahash = {e823412a57dde3f925a01190e2c129b0}, journal = {Integr.}, keywords = {dblp}, pages = {208-216}, timestamp = {2020-02-21T11:53:22.000+0100}, title = {Layout-aware design methodology for a 75 GHz power amplifier in a 55 nm SiGe technology.}, url = {http://dblp.uni-trier.de/db/journals/integration/integration52.html#RioGSBB16}, volume = 52, year = 2016 }