%0 Conference Paper %1 conf/asicon/WangL19 %A Wang, Joddy %A Lee, Frank %B ASICON %D 2019 %I IEEE %K dblp %P 1-4 %T Advanced Reliability-Aware Verification for Robust Circuit Design. %U http://dblp.uni-trier.de/db/conf/asicon/asicon2019.html#WangL19 %@ 978-1-7281-0735-6

@inproceedings{conf/asicon/WangL19, added-at = {2020-02-12T00:00:00.000+0100}, author = {Wang, Joddy and Lee, Frank}, biburl = {https://www.bibsonomy.org/bibtex/28872e88124d2f30524f3f622f3500696/dblp}, booktitle = {ASICON}, crossref = {conf/asicon/2019}, ee = {https://doi.org/10.1109/ASICON47005.2019.8983649}, interhash = {0c40ea65426bd726f86acdc005f61046}, intrahash = {8872e88124d2f30524f3f622f3500696}, isbn = {978-1-7281-0735-6}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2020-02-13T12:22:20.000+0100}, title = {Advanced Reliability-Aware Verification for Robust Circuit Design.}, url = {http://dblp.uni-trier.de/db/conf/asicon/asicon2019.html#WangL19}, year = 2019 }