%0 Conference Paper %1 conf/vlsid/HaldM93 %A Hald, Bjarne %A Madsen, Jan %B VLSI Design %D 1993 %I IEEE Computer Society %K dblp %P 226-229 %T Performance Aspects of Gate Matrix Layout. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid1993.html#HaldM93 %@ 0-8186-3180-5

@inproceedings{conf/vlsid/HaldM93, added-at = {2023-03-24T00:00:00.000+0100}, author = {Hald, Bjarne and Madsen, Jan}, biburl = {https://www.bibsonomy.org/bibtex/26d4d20bfae1884aab033bdae47c58e75/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/1993}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.1993.669684}, interhash = {0c55d1739cb6a3ffecbb4dad0d5fdd37}, intrahash = {6d4d20bfae1884aab033bdae47c58e75}, isbn = {0-8186-3180-5}, keywords = {dblp}, pages = {226-229}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T05:46:57.000+0200}, title = {Performance Aspects of Gate Matrix Layout.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid1993.html#HaldM93}, year = 1993 }