%0 Conference Paper %1 conf/iscas/MohieldinES02 %A Mohieldin, A. N. %A Emira, Ahmed %A Sánchez-Sinencio, Edgar %B ISCAS (4) %D 2002 %I IEEE %K dblp %P 667-670 %T A 2-V 11-bit incremental A/D converter using floating gate technique. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2002-4.html#MohieldinES02 %@ 0-7803-7448-7

@inproceedings{conf/iscas/MohieldinES02, added-at = {2016-05-20T00:00:00.000+0200}, author = {Mohieldin, A. N. and Emira, Ahmed and Sánchez-Sinencio, Edgar}, biburl = {https://www.bibsonomy.org/bibtex/2afc90f42ded28b2f6dc7eda9527d6402/dblp}, booktitle = {ISCAS (4)}, crossref = {conf/iscas/2002}, ee = {http://dx.doi.org/10.1109/ISCAS.2002.1010544}, interhash = {0ea51608153a605d9e7a3a2ec5a45b7a}, intrahash = {afc90f42ded28b2f6dc7eda9527d6402}, isbn = {0-7803-7448-7}, keywords = {dblp}, pages = {667-670}, publisher = {IEEE}, timestamp = {2016-05-21T12:03:45.000+0200}, title = {A 2-V 11-bit incremental A/D converter using floating gate technique.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2002-4.html#MohieldinES02}, year = 2002 }