%0 Journal Article %1 journals/mj/PosadasPNV14 %A Posadas, Héctor %A Peñil, Pablo %A Nicolás, Alejandro %A Villar, Eugenio %D 2014 %J Microelectron. J. %K dblp %N 10 %P 1281-1291 %T Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation. %U http://dblp.uni-trier.de/db/journals/mj/mj45.html#PosadasPNV14 %V 45

@article{journals/mj/PosadasPNV14, added-at = {2021-10-14T00:00:00.000+0200}, author = {Posadas, Héctor and Peñil, Pablo and Nicolás, Alejandro and Villar, Eugenio}, biburl = {https://www.bibsonomy.org/bibtex/2488e976e83a858b74c89c10a25f150b6/dblp}, ee = {https://doi.org/10.1016/j.mejo.2013.11.003}, interhash = {10e050defc18ddf4479414d504fb94da}, intrahash = {488e976e83a858b74c89c10a25f150b6}, journal = {Microelectron. J.}, keywords = {dblp}, number = 10, pages = {1281-1291}, timestamp = {2024-04-08T21:36:01.000+0200}, title = {Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation.}, url = {http://dblp.uni-trier.de/db/journals/mj/mj45.html#PosadasPNV14}, volume = 45, year = 2014 }