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%0 Conference Paper
%1 conf/iscas/ClarkeGCC06
%A Clarke, Jonathan A.
%A Gaffar, Altaf Abdul
%A Constantinides, George A.
%A Cheung, Peter Y. K.
%B ISCAS
%D 2006
%I IEEE
%K dblp
%T Fast word-level power models for synthesis of FPGA-based arithmetic.
%U http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#ClarkeGCC06
%@ 0-7803-9389-9
@inproceedings{conf/iscas/ClarkeGCC06,
added-at = {2007-07-23T00:00:00.000+0200},
author = {Clarke, Jonathan A. and Gaffar, Altaf Abdul and Constantinides, George A. and Cheung, Peter Y. K.},
biburl = {https://www.bibsonomy.org/bibtex/2f028cb79674e8fd49d4235b1854bc491/dblp},
booktitle = {ISCAS},
crossref = {conf/iscas/2006},
ee = {http://dx.doi.org/10.1109/ISCAS.2006.1692831},
interhash = {1709bac40341547d97bad6e6f09e61c2},
intrahash = {f028cb79674e8fd49d4235b1854bc491},
isbn = {0-7803-9389-9},
keywords = {dblp},
publisher = {IEEE},
timestamp = {2016-05-21T12:11:32.000+0200},
title = {Fast word-level power models for synthesis of FPGA-based arithmetic.},
url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#ClarkeGCC06},
year = 2006
}