%0 Conference Paper %1 conf/cse/WangWCSH09 %A Wang, Jyh-Shian %A Wu, I-Wei %A Chen, Yu-Sheng %A Shann, Jean Jyh-Jiun %A Hsu, Wei-Chung %B CSE (2) %D 2009 %I IEEE Computer Society %K dblp %P 174-181 %T Reducing Code Size by Graph Coloring Register Allocation and Assignment Algorithm for Mixed-Width ISA Processor. %U http://dblp.uni-trier.de/db/conf/cse/cse2009-2.html#WangWCSH09 %@ 978-1-4244-5334-4

@inproceedings{conf/cse/WangWCSH09, added-at = {2023-03-24T00:00:00.000+0100}, author = {Wang, Jyh-Shian and Wu, I-Wei and Chen, Yu-Sheng and Shann, Jean Jyh-Jiun and Hsu, Wei-Chung}, biburl = {https://www.bibsonomy.org/bibtex/2976a4a4c950aaaa0c7a05f19b1dd9a98/dblp}, booktitle = {CSE (2)}, crossref = {conf/cse/2009}, ee = {https://doi.ieeecomputersociety.org/10.1109/CSE.2009.100}, interhash = {18a03dfa3ca36561b7552d494d30864f}, intrahash = {976a4a4c950aaaa0c7a05f19b1dd9a98}, isbn = {978-1-4244-5334-4}, keywords = {dblp}, pages = {174-181}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:15:14.000+0200}, title = {Reducing Code Size by Graph Coloring Register Allocation and Assignment Algorithm for Mixed-Width ISA Processor.}, url = {http://dblp.uni-trier.de/db/conf/cse/cse2009-2.html#WangWCSH09}, year = 2009 }