%0 Journal Article %1 journals/tc/PomeranzR94a %A Pomeranz, Irith %A Reddy, Sudhakar M. %D 1994 %J IEEE Trans. Computers %K dblp %N 9 %P 1100-1105 %T On the Role of Hardware Reset in Synchronous Sequential Circuit Test Generation. %U http://dblp.uni-trier.de/db/journals/tc/tc43.html#PomeranzR94a %V 43

@article{journals/tc/PomeranzR94a, added-at = {2015-12-22T00:00:00.000+0100}, author = {Pomeranz, Irith and Reddy, Sudhakar M.}, biburl = {https://www.bibsonomy.org/bibtex/20ef086ed9851ec6eb0e75838d80878bc/dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/12.312119}, interhash = {1919e2d1c146a6fb14a010f4eae6aa8f}, intrahash = {0ef086ed9851ec6eb0e75838d80878bc}, journal = {IEEE Trans. Computers}, keywords = {dblp}, number = 9, pages = {1100-1105}, timestamp = {2015-12-24T11:54:55.000+0100}, title = {On the Role of Hardware Reset in Synchronous Sequential Circuit Test Generation.}, url = {http://dblp.uni-trier.de/db/journals/tc/tc43.html#PomeranzR94a}, volume = 43, year = 1994 }