%0 Conference Paper %1 conf/natw/ZhangA15 %A Zhang, Huiting %A Agrawal, Vishwani D. %B NATW %D 2015 %I IEEE %K dblp %P 55-60 %T SoC TAM Design to Minimize Test Application Time. %U http://dblp.uni-trier.de/db/conf/natw/natw2015.html#ZhangA15 %@ 978-1-4673-7417-0

@inproceedings{conf/natw/ZhangA15, added-at = {2017-05-26T00:00:00.000+0200}, author = {Zhang, Huiting and Agrawal, Vishwani D.}, biburl = {https://www.bibsonomy.org/bibtex/2793324cd8f041d45e27d9ce2f0a33a19/dblp}, booktitle = {NATW}, crossref = {conf/natw/2015}, ee = {https://doi.org/10.1109/NATW.2015.18}, interhash = {1afd2f6f7b321418177931b2a3dcbfe5}, intrahash = {793324cd8f041d45e27d9ce2f0a33a19}, isbn = {978-1-4673-7417-0}, keywords = {dblp}, pages = {55-60}, publisher = {IEEE}, timestamp = {2019-10-17T18:37:00.000+0200}, title = {SoC TAM Design to Minimize Test Application Time.}, url = {http://dblp.uni-trier.de/db/conf/natw/natw2015.html#ZhangA15}, year = 2015 }