%0 Journal Article %1 journals/ieicet/TeshimaCT95 %A Teshima, Shigeharu %A Chujo, Naoya %A Terashima, Ryuta %D 1995 %J IEICE Trans. Inf. Syst. %K dblp %N 7 %P 853-860 %T Very Fast Fault Simulation for Voltage Stuck-at Faults in Analog/Digital Mixed Circuit. %U http://dblp.uni-trier.de/db/journals/ieicet/ieicet78d.html#TeshimaCT95 %V 78-D

@article{journals/ieicet/TeshimaCT95, added-at = {2020-04-11T00:00:00.000+0200}, author = {Teshima, Shigeharu and Chujo, Naoya and Terashima, Ryuta}, biburl = {https://www.bibsonomy.org/bibtex/2f3ef9bd6c45733bc5fe317f0bfbe1f16/dblp}, ee = {http://search.ieice.org/bin/summary.php?id=e78-d_7_853}, interhash = {1dae7ef0bf8ef9120b92f7924ffedcee}, intrahash = {f3ef9bd6c45733bc5fe317f0bfbe1f16}, journal = {IEICE Trans. Inf. Syst.}, keywords = {dblp}, number = 7, pages = {853-860}, timestamp = {2020-04-14T11:54:09.000+0200}, title = {Very Fast Fault Simulation for Voltage Stuck-at Faults in Analog/Digital Mixed Circuit.}, url = {http://dblp.uni-trier.de/db/journals/ieicet/ieicet78d.html#TeshimaCT95}, volume = {78-D}, year = 1995 }