%0 Journal Article %1 journals/vlsisp/TuE91 %A Tu, Paul K.-G. %A Ercegovac, Milos D. %D 1991 %J VLSI Signal Processing %K dblp %N 4 %P 307-317 %T Gate array implementation of on-line algorithms for floating-point operations. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp3.html#TuE91 %V 3

@article{journals/vlsisp/TuE91, added-at = {2008-08-07T00:00:00.000+0200}, author = {Tu, Paul K.-G. and Ercegovac, Milos D.}, biburl = {https://www.bibsonomy.org/bibtex/2488a122784aae92e5fad862778e4d1c5/dblp}, date = {2008-08-07}, description = {dblp}, ee = {http://dx.doi.org/10.1007/BF00936903}, interhash = {204f9080f1facbf111b00e9a647a537a}, intrahash = {488a122784aae92e5fad862778e4d1c5}, journal = {VLSI Signal Processing}, keywords = {dblp}, number = 4, pages = {307-317}, timestamp = {2008-08-08T11:53:57.000+0200}, title = {Gate array implementation of on-line algorithms for floating-point operations.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp3.html#TuE91}, volume = 3, year = 1991 }