%0 Conference Paper %1 conf/mwscas/ShantaMHUR18 %A Shanta, Aysha S. %A Majumder, Md. Badruddoja %A Hasan, Md Sakib %A Uddin, Mesbah %A Rose, Garrett S. %B MWSCAS %D 2018 %I IEEE %K dblp %P 1016-1019 %T Design of a Reconfigurable Chaos Gate with Enhanced Functionality Space in 65nm CMOS. %U http://dblp.uni-trier.de/db/conf/mwscas/mwscas2018.html#ShantaMHUR18 %@ 978-1-5386-7392-8

@inproceedings{conf/mwscas/ShantaMHUR18, added-at = {2019-09-25T00:00:00.000+0200}, author = {Shanta, Aysha S. and Majumder, Md. Badruddoja and Hasan, Md Sakib and Uddin, Mesbah and Rose, Garrett S.}, biburl = {https://www.bibsonomy.org/bibtex/20a85fb52f33f798cbfb7748409d587ad/dblp}, booktitle = {MWSCAS}, crossref = {conf/mwscas/2018}, ee = {https://doi.org/10.1109/MWSCAS.2018.8624077}, interhash = {20f6afcde5ef205bf0b4ba15bc95ded8}, intrahash = {0a85fb52f33f798cbfb7748409d587ad}, isbn = {978-1-5386-7392-8}, keywords = {dblp}, pages = {1016-1019}, publisher = {IEEE}, timestamp = {2019-10-17T13:29:26.000+0200}, title = {Design of a Reconfigurable Chaos Gate with Enhanced Functionality Space in 65nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/mwscas/mwscas2018.html#ShantaMHUR18}, year = 2018 }