%0 Journal Article %1 journals/jssc/LeeKGKUCF15 %A Lee, Chang-Hyeon %A Kabalican, Lindel %A Ge, Yan %A Kwantono, Hendra %A Unruh, Greg %A Chambers, Mark %A Fujimori, Ichiro %D 2015 %J IEEE J. Solid State Circuits %K dblp %N 4 %P 856-866 %T A 2.7 GHz to 7 GHz Fractional-N LC-PLL Utilizing Multi-Metal Layer SoC Technology in 28 nm CMOS. %U http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#LeeKGKUCF15 %V 50

@article{journals/jssc/LeeKGKUCF15, added-at = {2020-08-30T00:00:00.000+0200}, author = {Lee, Chang-Hyeon and Kabalican, Lindel and Ge, Yan and Kwantono, Hendra and Unruh, Greg and Chambers, Mark and Fujimori, Ichiro}, biburl = {https://www.bibsonomy.org/bibtex/20b687c46ad41339a83d0651d70243208/dblp}, ee = {https://doi.org/10.1109/JSSC.2014.2371136}, interhash = {215c8b06bb081740e275faf9f9f4aac8}, intrahash = {0b687c46ad41339a83d0651d70243208}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 4, pages = {856-866}, timestamp = {2020-08-31T11:43:28.000+0200}, title = {A 2.7 GHz to 7 GHz Fractional-N LC-PLL Utilizing Multi-Metal Layer SoC Technology in 28 nm CMOS.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#LeeKGKUCF15}, volume = 50, year = 2015 }