%0 Journal Article %1 journals/ieicet/XiaIHK12 %A Xia, Zhengfan %A Ishihara, Shota %A Hariyama, Masanori %A Kameyama, Michitaka %D 2012 %J IEICE Trans. Electron. %K dblp %N 8 %P 1434-1443 %T Design of High-Performance Asynchronous Pipeline Using Synchronizing Logic Gates. %U http://dblp.uni-trier.de/db/journals/ieicet/ieicet95c.html#XiaIHK12 %V 95-C

@article{journals/ieicet/XiaIHK12, added-at = {2020-04-11T00:00:00.000+0200}, author = {Xia, Zhengfan and Ishihara, Shota and Hariyama, Masanori and Kameyama, Michitaka}, biburl = {https://www.bibsonomy.org/bibtex/2c2b880ad0b15b1643b7ff353f537e5d0/dblp}, ee = {http://search.ieice.org/bin/summary.php?id=e95-c_8_1434}, interhash = {12194582362ce4738a6e85e441d8d29e}, intrahash = {c2b880ad0b15b1643b7ff353f537e5d0}, journal = {IEICE Trans. Electron.}, keywords = {dblp}, number = 8, pages = {1434-1443}, timestamp = {2020-04-14T11:58:13.000+0200}, title = {Design of High-Performance Asynchronous Pipeline Using Synchronizing Logic Gates.}, url = {http://dblp.uni-trier.de/db/journals/ieicet/ieicet95c.html#XiaIHK12}, volume = {95-C}, year = 2012 }