%0 Conference Paper %1 conf/vlsid/ShanmugasundaramA12 %A Shanmugasundaram, Priyadharshini %A Agrawal, Vishwani D. %B VLSI Design %D 2012 %E Agrawal, Vishwani D. %E Chakradhar, Srimat T. %I IEEE Computer Society %K dblp %P 448-453 %T Externally Tested Scan Circuit with Built-In Activity Monitor and Adaptive Test Clock. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2012.html#ShanmugasundaramA12 %@ 978-1-4673-0438-2

@inproceedings{conf/vlsid/ShanmugasundaramA12, added-at = {2023-03-24T00:00:00.000+0100}, author = {Shanmugasundaram, Priyadharshini and Agrawal, Vishwani D.}, biburl = {https://www.bibsonomy.org/bibtex/20be9e9817f5e9c0f798aa0b1db55841a/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2012}, editor = {Agrawal, Vishwani D. and Chakradhar, Srimat T.}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2012.112}, interhash = {2300ee37debd86b217d4dfc69b17af4e}, intrahash = {0be9e9817f5e9c0f798aa0b1db55841a}, isbn = {978-1-4673-0438-2}, keywords = {dblp}, pages = {448-453}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T01:05:21.000+0200}, title = {Externally Tested Scan Circuit with Built-In Activity Monitor and Adaptive Test Clock.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2012.html#ShanmugasundaramA12}, year = 2012 }