%0 Conference Paper %1 conf/ipps/DasuS05 %A Dasu, Aravind %A Sudarsanam, Arvind %B IPDPS %D 2005 %I IEEE Computer Society %K dblp %T High Level - Application Analysis Techniques & Architectures - To Explore Design possibilities for Reduced Reconfiguration Area Overheads in FPGAs executing Compute Intensive Applications. %U http://dblp.uni-trier.de/db/conf/ipps/ipdps2005.html#DasuS05 %@ 0-7695-2312-9

@inproceedings{conf/ipps/DasuS05, added-at = {2023-03-24T00:00:00.000+0100}, author = {Dasu, Aravind and Sudarsanam, Arvind}, biburl = {https://www.bibsonomy.org/bibtex/2680034d1332702961b95b7be78082060/dblp}, booktitle = {IPDPS}, crossref = {conf/ipps/2005}, ee = {https://doi.ieeecomputersociety.org/10.1109/IPDPS.2005.242}, interhash = {2611b1cbbc09a1973d373b4c7c5ffaf0}, intrahash = {680034d1332702961b95b7be78082060}, isbn = {0-7695-2312-9}, keywords = {dblp}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T17:25:07.000+0200}, title = {High Level - Application Analysis Techniques & Architectures - To Explore Design possibilities for Reduced Reconfiguration Area Overheads in FPGAs executing Compute Intensive Applications.}, url = {http://dblp.uni-trier.de/db/conf/ipps/ipdps2005.html#DasuS05}, year = 2005 }