%0 Conference Paper %1 conf/arcs/MatsukawaNKSSOKYY14 %A Matsukawa, Go %A Nakata, Yohei %A Kimi, Yuta %A Sugure, Yasuo %A Shimozawa, Masafumi %A Oho, Shigeru %A Kawaguchi, Hiroshi %A Yoshimoto, Masahiko %B ARCS Workshops %D 2014 %E Stechele, Walter %E Wild, Thomas %I VDE Verlag / IEEE Xplore %K dblp %P 1-5 %T A Low-Latency DMR Architecture with Efficient Recovering Scheme Exploiting Simultaneously Copiable SRAM. %U http://dblp.uni-trier.de/db/conf/arcs/arcs2014w.html#MatsukawaNKSSOKYY14 %@ 978-3-8007-3579-2

@inproceedings{conf/arcs/MatsukawaNKSSOKYY14, added-at = {2024-03-13T00:00:00.000+0100}, author = {Matsukawa, Go and Nakata, Yohei and Kimi, Yuta and Sugure, Yasuo and Shimozawa, Masafumi and Oho, Shigeru and Kawaguchi, Hiroshi and Yoshimoto, Masahiko}, biburl = {https://www.bibsonomy.org/bibtex/22723bdeaee8dc9868a5550de0501fdde/dblp}, booktitle = {ARCS Workshops}, crossref = {conf/arcs/2014w}, editor = {Stechele, Walter and Wild, Thomas}, ee = {https://ieeexplore.ieee.org/document/6775097/}, interhash = {28b3a1fbc012c4d9e27e5fe1e2c967a2}, intrahash = {2723bdeaee8dc9868a5550de0501fdde}, isbn = {978-3-8007-3579-2}, keywords = {dblp}, pages = {1-5}, publisher = {VDE Verlag / IEEE Xplore}, timestamp = {2024-04-10T16:40:55.000+0200}, title = {A Low-Latency DMR Architecture with Efficient Recovering Scheme Exploiting Simultaneously Copiable SRAM.}, url = {http://dblp.uni-trier.de/db/conf/arcs/arcs2014w.html#MatsukawaNKSSOKYY14}, year = 2014 }