%0 Conference Paper %1 conf/fpl/Bautista-PalaciosBSHCM05 %A Bautista-Palacios, Marc %A Baldez, Luis %A Sempere-Agulló, Jordi %A Herms-Berenguer, Atilà %A Cardells-Tormo, Francisco %A Molinet, Pep-Lluis %B FPL %D 2005 %E Rissa, Tero %E Wilton, Steven J. E. %E Leong, Philip Heng Wai %I IEEE %K dblp %P 241-246 %T Configurable Hardware/Software Architecture for Data Acquisition: Implementation on FPGA. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2005.html#Bautista-PalaciosBSHCM05 %@ 0-7803-9362-7

@inproceedings{conf/fpl/Bautista-PalaciosBSHCM05, added-at = {2023-03-24T00:00:00.000+0100}, author = {Bautista-Palacios, Marc and Baldez, Luis and Sempere-Agulló, Jordi and Herms-Berenguer, Atilà and Cardells-Tormo, Francisco and Molinet, Pep-Lluis}, biburl = {https://www.bibsonomy.org/bibtex/267e114e788d0101aa894b9097afac5a6/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2005}, editor = {Rissa, Tero and Wilton, Steven J. E. and Leong, Philip Heng Wai}, ee = {https://doi.ieeecomputersociety.org/10.1109/FPL.2005.1515729}, interhash = {2c8ca300db624617f99cc2639f005125}, intrahash = {67e114e788d0101aa894b9097afac5a6}, isbn = {0-7803-9362-7}, keywords = {dblp}, pages = {241-246}, publisher = {IEEE}, timestamp = {2024-04-10T14:52:35.000+0200}, title = {Configurable Hardware/Software Architecture for Data Acquisition: Implementation on FPGA.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2005.html#Bautista-PalaciosBSHCM05}, year = 2005 }