%0 Journal Article %1 journals/tvlsi/ZhuoWCACS15 %A Zhuo, Cheng %A Wilke, Gustavo R. %A Chakraborty, Ritochit %A Aydiner, Alaeddin A. %A Chakravarty, Sourav %A Shih, Wei-Kai %D 2015 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 9 %P 1760-1771 %T Silicon-Validated Power Delivery Modeling and Analysis on a 32-nm DDR I/O Interface. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi23.html#ZhuoWCACS15 %V 23

@article{journals/tvlsi/ZhuoWCACS15, added-at = {2020-03-11T00:00:00.000+0100}, author = {Zhuo, Cheng and Wilke, Gustavo R. and Chakraborty, Ritochit and Aydiner, Alaeddin A. and Chakravarty, Sourav and Shih, Wei-Kai}, biburl = {https://www.bibsonomy.org/bibtex/28fb58f87e1cf12a58bfead1a3b3f05a3/dblp}, ee = {https://doi.org/10.1109/TVLSI.2014.2355230}, interhash = {344c81405fa804a39ee1b3e13a198899}, intrahash = {8fb58f87e1cf12a58bfead1a3b3f05a3}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 9, pages = {1760-1771}, timestamp = {2020-03-12T11:45:34.000+0100}, title = {Silicon-Validated Power Delivery Modeling and Analysis on a 32-nm DDR I/O Interface.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi23.html#ZhuoWCACS15}, volume = 23, year = 2015 }