%0 Journal Article %1 journals/integration/HussainMMD20 %A Hussain, Sheikh Wasmir %A Mahendra, Telajala Venkata %A Mishra, Sandeep %A Dandapat, Anup %D 2020 %J Integr. %K dblp %P 73-84 %T Low-power content addressable memory design using two-layer P-N match-line control and sensing. %U http://dblp.uni-trier.de/db/journals/integration/integration75.html#HussainMMD20 %V 75

@article{journals/integration/HussainMMD20, added-at = {2022-10-02T00:00:00.000+0200}, author = {Hussain, Sheikh Wasmir and Mahendra, Telajala Venkata and Mishra, Sandeep and Dandapat, Anup}, biburl = {https://www.bibsonomy.org/bibtex/2a931a48f1d62e8c843b27347396af124/dblp}, ee = {https://doi.org/10.1016/j.vlsi.2020.06.001}, interhash = {35d6608acb356486d63f282ea448c021}, intrahash = {a931a48f1d62e8c843b27347396af124}, journal = {Integr.}, keywords = {dblp}, pages = {73-84}, timestamp = {2024-04-08T13:15:20.000+0200}, title = {Low-power content addressable memory design using two-layer P-N match-line control and sensing.}, url = {http://dblp.uni-trier.de/db/journals/integration/integration75.html#HussainMMD20}, volume = 75, year = 2020 }