Inproceedings,
Power-efficient, reliable microprocessor architectures: modeling and design methods.
P. Bose, A. Buyuktosunoglu, C. Cher, J. Darringer, M. Gupta, H. Hamann, H. Jacobson, P. Kudva, E. Kursun, N. Madan, I. Nair, J. Rivers, J. Shin, A. Weger, and V. Zyuban.ACM Great Lakes Symposium on VLSI, page 299-304. ACM, (2010)
Meta data
- BibTeX key
- conf/glvlsi/BoseBCDGHJKKMNRSWZ10
- entry type
- inproceedings
- booktitle
- ACM Great Lakes Symposium on VLSI
- year
- 2010
- pages
- 299-304
- publisher
- ACM
- crossref
- conf/glvlsi/2010
- ee
- https://doi.org/10.1145/1785481.1785551
- isbn
- 978-1-4503-0012-4
- url
- http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2010.html#BoseBCDGHJKKMNRSWZ10
Tags
Users
Comments and Reviewsshow / hide
Cite this publication
More citation styles
- please select -%0 Conference Paper
%1 conf/glvlsi/BoseBCDGHJKKMNRSWZ10
%A Bose, Pradip
%A Buyuktosunoglu, Alper
%A Cher, Chen-Yong
%A Darringer, John A.
%A Gupta, Meeta Sharma
%A Hamann, Hendrik F.
%A Jacobson, Hans M.
%A Kudva, Prabhakar
%A Kursun, Eren
%A Madan, Niti
%A Nair, Indira
%A Rivers, Jude A.
%A Shin, Jeonghee
%A Weger, Alan J.
%A Zyuban, Victor V.
%B ACM Great Lakes Symposium on VLSI
%D 2010
%E Bahar, R. Iris
%E Lombardi, Fabrizio
%E Atienza, David
%E Brunvand, Erik
%I ACM
%K dblp
%P 299-304
%T Power-efficient, reliable microprocessor architectures: modeling and design methods.
%U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2010.html#BoseBCDGHJKKMNRSWZ10
%@ 978-1-4503-0012-4
@inproceedings{conf/glvlsi/BoseBCDGHJKKMNRSWZ10,
added-at = {2018-11-06T00:00:00.000+0100},
author = {Bose, Pradip and Buyuktosunoglu, Alper and Cher, Chen-Yong and Darringer, John A. and Gupta, Meeta Sharma and Hamann, Hendrik F. and Jacobson, Hans M. and Kudva, Prabhakar and Kursun, Eren and Madan, Niti and Nair, Indira and Rivers, Jude A. and Shin, Jeonghee and Weger, Alan J. and Zyuban, Victor V.},
biburl = {https://www.bibsonomy.org/bibtex/2efed7542d6280b23f09f598aae032fb7/dblp},
booktitle = {ACM Great Lakes Symposium on VLSI},
crossref = {conf/glvlsi/2010},
editor = {Bahar, R. Iris and Lombardi, Fabrizio and Atienza, David and Brunvand, Erik},
ee = {https://doi.org/10.1145/1785481.1785551},
interhash = {37e064f60c959a373def86c8e0e75a28},
intrahash = {efed7542d6280b23f09f598aae032fb7},
isbn = {978-1-4503-0012-4},
keywords = {dblp},
pages = {299-304},
publisher = {ACM},
timestamp = {2018-11-07T14:24:46.000+0100},
title = {Power-efficient, reliable microprocessor architectures: modeling and design methods.},
url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2010.html#BoseBCDGHJKKMNRSWZ10},
year = 2010
}