%0 Journal Article %1 journals/tcad/PomeranzR06a %A Pomeranz, Irith %A Reddy, Sudhakar M. %D 2006 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 6 %P 1170-1175 %T Transparent DFT: a design for testability and test generation approach for synchronous sequential circuits. %U http://dblp.uni-trier.de/db/journals/tcad/tcad25.html#PomeranzR06a %V 25

@article{journals/tcad/PomeranzR06a, added-at = {2020-09-24T00:00:00.000+0200}, author = {Pomeranz, Irith and Reddy, Sudhakar M.}, biburl = {https://www.bibsonomy.org/bibtex/21db310873a6496a1634d7680af022f66/dblp}, ee = {https://doi.org/10.1109/TCAD.2005.855947}, interhash = {3991d2cf156bb91e6bd904e7934489a5}, intrahash = {1db310873a6496a1634d7680af022f66}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 6, pages = {1170-1175}, timestamp = {2020-09-25T11:50:39.000+0200}, title = {Transparent DFT: a design for testability and test generation approach for synchronous sequential circuits.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad25.html#PomeranzR06a}, volume = 25, year = 2006 }