%0 Journal Article %1 journals/vlsi/VaddiDA09 %A Vaddi, Ramesh %A Dasgupta, Sudeb %A Agarwal, R. P. %D 2009 %J VLSI Design %K dblp %P 283702:1-283702:14 %T Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications. %U http://dblp.uni-trier.de/db/journals/vlsi/vlsi2009.html#VaddiDA09 %V 2009

@article{journals/vlsi/VaddiDA09, added-at = {2018-11-24T00:00:00.000+0100}, author = {Vaddi, Ramesh and Dasgupta, Sudeb and Agarwal, R. P.}, biburl = {https://www.bibsonomy.org/bibtex/2b58fb9b2d1db635321736fca71546a30/dblp}, ee = {https://www.wikidata.org/entity/Q58649101}, interhash = {3b6869df04ce798f17a1ae9e22448d61}, intrahash = {b58fb9b2d1db635321736fca71546a30}, journal = {VLSI Design}, keywords = {dblp}, pages = {283702:1-283702:14}, timestamp = {2018-11-27T11:39:44.000+0100}, title = {Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications.}, url = {http://dblp.uni-trier.de/db/journals/vlsi/vlsi2009.html#VaddiDA09}, volume = 2009, year = 2009 }