%0 Conference Paper %1 conf/vlsid/TerechkoGC05 %A Terechko, Andrei Sergeevich %A Garg, Manish %A Corporaal, Henk %B VLSI Design %D 2005 %I IEEE Computer Society %K dblp %P 557-563 %T Evaluation of Speed and Area of Clustered VLIW Processors. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2005.html#TerechkoGC05 %@ 0-7695-2264-5

@inproceedings{conf/vlsid/TerechkoGC05, added-at = {2023-03-24T00:00:00.000+0100}, author = {Terechko, Andrei Sergeevich and Garg, Manish and Corporaal, Henk}, biburl = {https://www.bibsonomy.org/bibtex/2051f565f870999badee16d941df73f7d/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2005}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.2005.95}, interhash = {3fd39e64cb408c88c8ac6f244276b431}, intrahash = {051f565f870999badee16d941df73f7d}, isbn = {0-7695-2264-5}, keywords = {dblp}, pages = {557-563}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:41.000+0200}, title = {Evaluation of Speed and Area of Clustered VLIW Processors.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2005.html#TerechkoGC05}, year = 2005 }