%0 Conference Paper %1 conf/eurodac/ChenYF94 %A Chen, Ben %A Yamazaki, Michihiro %A Fujita, Masahiro %B EDAC-ETC-EUROASIC %D 1994 %E Werner, Robert %I IEEE Computer Society %K dblp %P 132-136 %T Bug Identification of a Real Chip Design by Symbolic Model Checking. %U http://dblp.uni-trier.de/db/conf/eurodac/eurodac1994.html#ChenYF94 %@ 0-8186-5410-4

@inproceedings{conf/eurodac/ChenYF94, added-at = {2017-05-24T00:00:00.000+0200}, author = {Chen, Ben and Yamazaki, Michihiro and Fujita, Masahiro}, biburl = {https://www.bibsonomy.org/bibtex/27cb6ed8fe49c1e2e5e2f8fce3799a8f4/dblp}, booktitle = {EDAC-ETC-EUROASIC}, crossref = {conf/eurodac/1994edac}, editor = {Werner, Robert}, ee = {https://doi.org/10.1109/EDTC.1994.326886}, interhash = {42c8fe0e0389a908b53a08900e97aa12}, intrahash = {7cb6ed8fe49c1e2e5e2f8fce3799a8f4}, isbn = {0-8186-5410-4}, keywords = {dblp}, pages = {132-136}, publisher = {IEEE Computer Society}, timestamp = {2019-10-17T22:26:24.000+0200}, title = {Bug Identification of a Real Chip Design by Symbolic Model Checking.}, url = {http://dblp.uni-trier.de/db/conf/eurodac/eurodac1994.html#ChenYF94}, year = 1994 }