%0 Journal Article %1 journals/vlsi/BandyopadhyaySB96 %A Bandyopadhyay, Subir %A Sengupta, Abhijit %A Bhattacharya, Bhargab B. %D 1996 %J VLSI Design %K dblp %N 3 %P 257-269 %T A Methodology for Testing Arbitrary Bilateral Bit-Level Systolic Arrays. %U http://dblp.uni-trier.de/db/journals/vlsi/vlsi4.html#BandyopadhyaySB96 %V 4

@article{journals/vlsi/BandyopadhyaySB96, added-at = {2022-11-07T00:00:00.000+0100}, author = {Bandyopadhyay, Subir and Sengupta, Abhijit and Bhattacharya, Bhargab B.}, biburl = {https://www.bibsonomy.org/bibtex/2b5c2a781976d9ff4d59aacf3dd515a2c/dblp}, ee = {https://doi.org/10.1155/1996/84045}, interhash = {4475d5a9be63442b5c86d35a99b1004d}, intrahash = {b5c2a781976d9ff4d59aacf3dd515a2c}, journal = {VLSI Design}, keywords = {dblp}, number = 3, pages = {257-269}, timestamp = {2024-04-08T12:07:12.000+0200}, title = {A Methodology for Testing Arbitrary Bilateral Bit-Level Systolic Arrays.}, url = {http://dblp.uni-trier.de/db/journals/vlsi/vlsi4.html#BandyopadhyaySB96}, volume = 4, year = 1996 }