%0 Journal Article %1 journals/tcad/SaxenaG03 %A Saxena, Prashant %A Gupta, Satyanarayan %D 2003 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 4 %P 437-445 %T On integrating power and signal routing for shield count minimization in congested regions. %U http://dblp.uni-trier.de/db/journals/tcad/tcad22.html#SaxenaG03 %V 22

@article{journals/tcad/SaxenaG03, added-at = {2020-09-24T00:00:00.000+0200}, author = {Saxena, Prashant and Gupta, Satyanarayan}, biburl = {https://www.bibsonomy.org/bibtex/24092247de7471081fc8bb40349f900fb/dblp}, ee = {https://doi.org/10.1109/TCAD.2003.809654}, interhash = {4eec1a2d179d11dcc69b13c16b071e61}, intrahash = {4092247de7471081fc8bb40349f900fb}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 4, pages = {437-445}, timestamp = {2020-09-25T11:47:15.000+0200}, title = {On integrating power and signal routing for shield count minimization in congested regions.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad22.html#SaxenaG03}, volume = 22, year = 2003 }