%0 Journal Article %1 journals/jssc/CosemansDC09 %A Cosemans, Stefan %A Dehaene, Wim %A Catthoor, Francky %D 2009 %J IEEE J. Solid State Circuits %K dblp %N 7 %P 2065-2077 %T A 3.6 pJ/Access 480 MHz, 128 kb On-Chip SRAM With 850 MHz Boost Mode in 90 nm CMOS With Tunable Sense Amplifiers. %U http://dblp.uni-trier.de/db/journals/jssc/jssc44.html#CosemansDC09 %V 44

@article{journals/jssc/CosemansDC09, added-at = {2020-08-30T00:00:00.000+0200}, author = {Cosemans, Stefan and Dehaene, Wim and Catthoor, Francky}, biburl = {https://www.bibsonomy.org/bibtex/2ca756c7dc0537eb6bca5d9c9970aef40/dblp}, ee = {https://doi.org/10.1109/JSSC.2009.2021925}, interhash = {1504a798838adb737c0e2d278e66646c}, intrahash = {ca756c7dc0537eb6bca5d9c9970aef40}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 7, pages = {2065-2077}, timestamp = {2020-08-31T11:43:22.000+0200}, title = {A 3.6 pJ/Access 480 MHz, 128 kb On-Chip SRAM With 850 MHz Boost Mode in 90 nm CMOS With Tunable Sense Amplifiers.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc44.html#CosemansDC09}, volume = 44, year = 2009 }