%0 Journal Article %1 journals/jssc/KojimaTS95 %A Kojima, Hirotsugu %A Tanaka, Satoshi %A Sasaki, Katsuro %D 1995 %J IEEE J. Solid State Circuits %K dblp %N 4 %P 432-435 %T Half-swing clocking scheme for 75% power saving in clocking circuitry. %U http://dblp.uni-trier.de/db/journals/jssc/jssc30.html#KojimaTS95 %V 30

@article{journals/jssc/KojimaTS95, added-at = {2023-05-03T00:00:00.000+0200}, author = {Kojima, Hirotsugu and Tanaka, Satoshi and Sasaki, Katsuro}, biburl = {https://www.bibsonomy.org/bibtex/2858daa20db88a0291f134a5f4752330c/dblp}, ee = {https://doi.org/10.1109/4.375963}, interhash = {524daf8c0ff4a83d102c4ce7c4f835a7}, intrahash = {858daa20db88a0291f134a5f4752330c}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, month = {April}, number = 4, pages = {432-435}, timestamp = {2024-04-08T10:43:52.000+0200}, title = {Half-swing clocking scheme for 75% power saving in clocking circuitry.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc30.html#KojimaTS95}, volume = 30, year = 1995 }