%0 Conference Paper %1 conf/trustcom/PengH13 %A Peng, Manman %A Hu, Yan %B TrustCom/ISPA/IUCC %D 2013 %I IEEE Computer Society %K dblp %P 1652-1655 %T A Power Model Combined of Architectural Level and Gate Level for Multicore Processors. %U http://dblp.uni-trier.de/db/conf/trustcom/trustcom2013.html#PengH13 %@ 978-0-7695-5022-0

@inproceedings{conf/trustcom/PengH13, added-at = {2023-03-24T00:00:00.000+0100}, author = {Peng, Manman and Hu, Yan}, biburl = {https://www.bibsonomy.org/bibtex/27b0fcbdd3f1bce5aed13fbbd829558ee/dblp}, booktitle = {TrustCom/ISPA/IUCC}, crossref = {conf/trustcom/2013}, ee = {https://doi.ieeecomputersociety.org/10.1109/TrustCom.2013.204}, interhash = {53d4a203d58d3becc7db188903fa6f96}, intrahash = {7b0fcbdd3f1bce5aed13fbbd829558ee}, isbn = {978-0-7695-5022-0}, keywords = {dblp}, pages = {1652-1655}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T16:25:45.000+0200}, title = {A Power Model Combined of Architectural Level and Gate Level for Multicore Processors.}, url = {http://dblp.uni-trier.de/db/conf/trustcom/trustcom2013.html#PengH13}, year = 2013 }