%0 Conference Paper %1 conf/vlsid/ZhengLI96 %A Zheng, Si-Qing %A Lim, Joon Shik %A Iyengar, S. Sitharama %B VLSI Design %D 1996 %I IEEE Computer Society %K dblp %P 49-52 %T Routing using implicit connection graphs VLSI design. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid1996.html#ZhengLI96 %@ 0-8186-7228-5

@inproceedings{conf/vlsid/ZhengLI96, added-at = {2023-03-24T00:00:00.000+0100}, author = {Zheng, Si-Qing and Lim, Joon Shik and Iyengar, S. Sitharama}, biburl = {https://www.bibsonomy.org/bibtex/2cf4a6b89454b091cda637613b427cba3/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/1996}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.1996.489453}, interhash = {549c3d6d5ab8568e3bd3b7c49a84e543}, intrahash = {cf4a6b89454b091cda637613b427cba3}, isbn = {0-8186-7228-5}, keywords = {dblp}, pages = {49-52}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T05:46:51.000+0200}, title = {Routing using implicit connection graphs [VLSI design.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid1996.html#ZhengLI96}, year = 1996 }