%0 Conference Paper %1 conf/iscas/ChengCYLT06 %A Cheng, Kuo-Hsing %A Chang, Kai-Fei %A Lo, Yu-Lung %A Lai, Ching-Wen %A Tseng, Yuh-Kuang %B ISCAS %D 2006 %I IEEE %K dblp %T A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#ChengCYLT06 %@ 0-7803-9389-9

@inproceedings{conf/iscas/ChengCYLT06, added-at = {2013-07-08T00:00:00.000+0200}, author = {Cheng, Kuo-Hsing and Chang, Kai-Fei and Lo, Yu-Lung and Lai, Ching-Wen and Tseng, Yuh-Kuang}, biburl = {https://www.bibsonomy.org/bibtex/2aa2b83939104f3b606bd2790b6d99e69/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2006}, ee = {http://dx.doi.org/10.1109/ISCAS.2006.1693307}, interhash = {56cbb1c33f2e80710141a65178772a86}, intrahash = {aa2b83939104f3b606bd2790b6d99e69}, isbn = {0-7803-9389-9}, keywords = {dblp}, publisher = {IEEE}, timestamp = {2016-05-21T12:11:32.000+0200}, title = {A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#ChengCYLT06}, year = 2006 }