%0 Journal Article %1 journals/jssc/ShirahamaAKNAKS05 %A Shirahama, Masanori %A Agata, Yasuhiro %A Kawasaki, Toshiaki %A Nishihara, Ryuji %A Abe, Wataru %A Kuroda, Naoki %A Sadakata, Hiroyuki %A Uchikoba, Toshitaka %A Takahashi, Kazunari %A Egashira, Kyoko %A Honda, Shinji %A Miura, Miho %A Hashimoto, Shin %A Kikukawa, Hirohito %A Yamauchi, Hiroyuki %D 2005 %J IEEE J. Solid State Circuits %K dblp %N 5 %P 1200-1207 %T A 400-MHz random-cycle dual-port interleaved DRAM (D2RAM) with standard CMOS Process. %U http://dblp.uni-trier.de/db/journals/jssc/jssc40.html#ShirahamaAKNAKS05 %V 40

@article{journals/jssc/ShirahamaAKNAKS05, added-at = {2024-02-05T00:00:00.000+0100}, author = {Shirahama, Masanori and Agata, Yasuhiro and Kawasaki, Toshiaki and Nishihara, Ryuji and Abe, Wataru and Kuroda, Naoki and Sadakata, Hiroyuki and Uchikoba, Toshitaka and Takahashi, Kazunari and Egashira, Kyoko and Honda, Shinji and Miura, Miho and Hashimoto, Shin and Kikukawa, Hirohito and Yamauchi, Hiroyuki}, biburl = {https://www.bibsonomy.org/bibtex/2d520fb49337c85717627e18c2a7c2dd9/dblp}, ee = {https://doi.org/10.1109/JSSC.2005.845995}, interhash = {582f6e9baf2dedf97c98d534668465c3}, intrahash = {d520fb49337c85717627e18c2a7c2dd9}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 5, pages = {1200-1207}, timestamp = {2024-04-08T10:42:26.000+0200}, title = {A 400-MHz random-cycle dual-port interleaved DRAM (D2RAM) with standard CMOS Process.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc40.html#ShirahamaAKNAKS05}, volume = 40, year = 2005 }