%0 Conference Paper %1 conf/coolchips/ChenI12 %A Chen, Tse-Wei %A Ikeda, Makoto %B COOL Chips %D 2012 %E Kobayashi, Hiroaki %E Ikeda, Makoto %E Arakawa, Fumio %I IEEE Computer Society %K dblp %P 1-3 %T Dual-stage hardware architecture of on-line clustering with high-throughput parallel divider for low-power signal processing. %U http://dblp.uni-trier.de/db/conf/coolchips/coolchips2012.html#ChenI12 %@ 978-1-4673-1201-1

@inproceedings{conf/coolchips/ChenI12, added-at = {2023-03-23T00:00:00.000+0100}, author = {Chen, Tse-Wei and Ikeda, Makoto}, biburl = {https://www.bibsonomy.org/bibtex/27464ad4ee5d69b999097e2b424bb10b8/dblp}, booktitle = {COOL Chips}, crossref = {conf/coolchips/2012}, editor = {Kobayashi, Hiroaki and Ikeda, Makoto and Arakawa, Fumio}, ee = {https://doi.ieeecomputersociety.org/10.1109/COOLChips.2012.6216580}, interhash = {653fd4a7be57dff6446961f8ddb8a214}, intrahash = {7464ad4ee5d69b999097e2b424bb10b8}, isbn = {978-1-4673-1201-1}, keywords = {dblp}, pages = {1-3}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T10:16:58.000+0200}, title = {Dual-stage hardware architecture of on-line clustering with high-throughput parallel divider for low-power signal processing.}, url = {http://dblp.uni-trier.de/db/conf/coolchips/coolchips2012.html#ChenI12}, year = 2012 }