%0 Conference Paper %1 conf/dsd/RajiGP15 %A Raji, Mohsen %A Ghavami, Behnam %A Pedram, Hossein %B DSD %D 2015 %I IEEE Computer Society %K dblp %P 445-452 %T Gate Resizing for Soft Error Rate Reduction in Nano-scale Digital Circuits Considering Process Variations. %U http://dblp.uni-trier.de/db/conf/dsd/dsd2015.html#RajiGP15 %@ 978-1-4673-8035-5

@inproceedings{conf/dsd/RajiGP15, added-at = {2023-03-23T00:00:00.000+0100}, author = {Raji, Mohsen and Ghavami, Behnam and Pedram, Hossein}, biburl = {https://www.bibsonomy.org/bibtex/27a12432d068c7d3b6a2ef1809dd5f4b4/dblp}, booktitle = {DSD}, crossref = {conf/dsd/2015}, ee = {https://doi.ieeecomputersociety.org/10.1109/DSD.2015.103}, interhash = {66b9eda76f916a0360674524e74287b2}, intrahash = {7a12432d068c7d3b6a2ef1809dd5f4b4}, isbn = {978-1-4673-8035-5}, keywords = {dblp}, pages = {445-452}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T14:11:29.000+0200}, title = {Gate Resizing for Soft Error Rate Reduction in Nano-scale Digital Circuits Considering Process Variations.}, url = {http://dblp.uni-trier.de/db/conf/dsd/dsd2015.html#RajiGP15}, year = 2015 }