%0 Conference Paper %1 conf/acssc/DidierJ13 %A Didier, Laurent-Stéphane %A Jaulmes, Luc %B ACSSC %D 2013 %E Matthews, Michael B. %I IEEE %K dblp %P 1155-1159 %T Fast modulo 2n-1 and 2n;1 adder using carry-chain on FPGA. %U http://dblp.uni-trier.de/db/conf/acssc/acssc2013.html#DidierJ13 %@ 978-1-4799-2390-8

@inproceedings{conf/acssc/DidierJ13, added-at = {2022-04-09T00:00:00.000+0200}, author = {Didier, Laurent-Stéphane and Jaulmes, Luc}, biburl = {https://www.bibsonomy.org/bibtex/21a9c398cce9ddc28e437ec8a4c47d21e/dblp}, booktitle = {ACSSC}, crossref = {conf/acssc/2013}, editor = {Matthews, Michael B.}, ee = {https://doi.org/10.1109/ACSSC.2013.6810475}, interhash = {6816118beb96f84b8185bab58ac8070d}, intrahash = {1a9c398cce9ddc28e437ec8a4c47d21e}, isbn = {978-1-4799-2390-8}, keywords = {dblp}, pages = {1155-1159}, publisher = {IEEE}, timestamp = {2024-04-10T08:35:23.000+0200}, title = {Fast modulo 2n-1 and 2n;1 adder using carry-chain on FPGA.}, url = {http://dblp.uni-trier.de/db/conf/acssc/acssc2013.html#DidierJ13}, year = 2013 }