%0 Journal Article %1 journals/tc/ReeseTT05 %A Reese, Robert B. %A Thornton, Mitchell A. %A Traver, Cherrice %D 2005 %J IEEE Trans. Computers %K dblp %N 7 %P 788-799 %T A Coarse-Grain Phased Logic CPU. %U http://dblp.uni-trier.de/db/journals/tc/tc54.html#ReeseTT05 %V 54

@article{journals/tc/ReeseTT05, added-at = {2019-06-02T00:00:00.000+0200}, author = {Reese, Robert B. and Thornton, Mitchell A. and Traver, Cherrice}, biburl = {https://www.bibsonomy.org/bibtex/272223e345a81f6dc84152b5e149b9e40/dblp}, ee = {https://www.wikidata.org/entity/Q62513287}, interhash = {6db3b357d156c8b6cec99c2a5fc11096}, intrahash = {72223e345a81f6dc84152b5e149b9e40}, journal = {IEEE Trans. Computers}, keywords = {dblp}, number = 7, pages = {788-799}, timestamp = {2019-06-04T11:46:25.000+0200}, title = {A Coarse-Grain Phased Logic CPU.}, url = {http://dblp.uni-trier.de/db/journals/tc/tc54.html#ReeseTT05}, volume = 54, year = 2005 }