%0 Conference Paper %1 agostinelli:09 %A Agostinelli, M. %A Alioto, M. %A Esseni, D. %A Selmi, L. %B Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation %D 2009 %I Springer Berlin Heidelberg %K class-1-journal powerdcdc %T Design and evaluation of mixed 3T-4T FinFET stacks for leakage reduction %V 5349

@inproceedings{agostinelli:09, added-at = {2016-06-30T15:55:44.000+0200}, author = {Agostinelli, M. and Alioto, M. and Esseni, D. and Selmi, L.}, biburl = {https://www.bibsonomy.org/bibtex/22606502ee5c78b6f52d7cff1481c146f/lakeside-labs}, booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation}, interhash = {71d6d9c9ccba23981a81eb5cb583a718}, intrahash = {2606502ee5c78b6f52d7cff1481c146f}, keywords = {class-1-journal powerdcdc}, publisher = {Springer Berlin Heidelberg}, series = {Lecture Notes in Computer Science}, timestamp = {2016-09-19T13:18:15.000+0200}, title = {Design and evaluation of mixed 3T-4T FinFET stacks for leakage reduction}, volume = 5349, year = 2009 }