%0 Conference Paper %1 conf/vlsid/NagVR99 %A Nag, Sudip %A Verma, H. K. %A Roy, Kaushik %B VLSI Design %D 1999 %I IEEE Computer Society %K dblp %P 609 %T VLSI Signal Processing in FPGAs. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid1999.html#NagVR99 %@ 0-7695-0013-7

@inproceedings{conf/vlsid/NagVR99, added-at = {2015-08-26T00:00:00.000+0200}, author = {Nag, Sudip and Verma, H. K. and Roy, Kaushik}, biburl = {https://www.bibsonomy.org/bibtex/284dbd57928274f193d843b2e330c72b3/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/1999}, ee = {http://www.computer.org/csdl/proceedings/vlsid/1999/0013/00/00130609.pdf}, interhash = {7306c484236826a90b64979734f087ee}, intrahash = {84dbd57928274f193d843b2e330c72b3}, isbn = {0-7695-0013-7}, keywords = {dblp}, pages = 609, publisher = {IEEE Computer Society}, timestamp = {2016-07-28T11:39:48.000+0200}, title = {VLSI Signal Processing in FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid1999.html#NagVR99}, year = 1999 }