%0 Journal Article %1 journals/jssc/VorenkampR97 %A Vorenkamp, Pieter %A Roovers, Raf %D 1997 %J IEEE J. Solid State Circuits %K dblp %N 11 %P 1876-1886 %T A 12-b, 60-MSample/s cascaded folding and interpolating ADC. %U http://dblp.uni-trier.de/db/journals/jssc/jssc32.html#VorenkampR97 %V 32

@article{journals/jssc/VorenkampR97, added-at = {2022-07-07T00:00:00.000+0200}, author = {Vorenkamp, Pieter and Roovers, Raf}, biburl = {https://www.bibsonomy.org/bibtex/219657696971ee45aceb19832fe349c69/dblp}, ee = {https://doi.org/10.1109/4.643646}, interhash = {78918efe58402b08843105afed5e8c91}, intrahash = {19657696971ee45aceb19832fe349c69}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 11, pages = {1876-1886}, timestamp = {2024-04-08T10:42:02.000+0200}, title = {A 12-b, 60-MSample/s cascaded folding and interpolating ADC.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc32.html#VorenkampR97}, volume = 32, year = 1997 }