%0 Conference Paper %1 conf/arvlsi/HassVB01 %A Hass, K. Joseph %A Venbrux, Jack %A Bhatia, Prakash %B ARVLSI %D 2001 %I IEEE Computer Society %K dblp %P 75-87 %T Logic Design Considerations for 0.5-Volt CMOS. %U http://dblp.uni-trier.de/db/conf/arvlsi/arvlsi2001.html#HassVB01 %@ 0-7695-1037-X

@inproceedings{conf/arvlsi/HassVB01, added-at = {2023-03-24T00:00:00.000+0100}, author = {Hass, K. Joseph and Venbrux, Jack and Bhatia, Prakash}, biburl = {https://www.bibsonomy.org/bibtex/27731253f8f4f5a4bff914f5d1e095c2f/dblp}, booktitle = {ARVLSI}, crossref = {conf/arvlsi/2001}, ee = {https://doi.ieeecomputersociety.org/10.1109/ARVLSI.2001.915552}, interhash = {7b36623a85313621941bed8732a753a8}, intrahash = {7731253f8f4f5a4bff914f5d1e095c2f}, isbn = {0-7695-1037-X}, keywords = {dblp}, pages = {75-87}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T16:46:51.000+0200}, title = {Logic Design Considerations for 0.5-Volt CMOS.}, url = {http://dblp.uni-trier.de/db/conf/arvlsi/arvlsi2001.html#HassVB01}, year = 2001 }