Inproceedings,
A 13Bit 5GS/S ADC with Time-Interleaved Chopping Calibration in 16NM FinFET.
B. Vaz, B. Verbruggen, C. Erdmann, D. Collins, J. McGrath, A. Boumaalif, E. Cullen, D. Walsh, A. Morgado, C. Mesadri, B. Long, R. Pathepuram, R. Torre, A. Manlapat, G. Karyotis, D. Tsaliagos, P. Lynch, P. Lim, D. Breathnach, and B. Farley.VLSI Circuits, page 99-100. IEEE, (2018)
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- conf/vlsic/VazVECMBCWMMLPT18
- entry type
- inproceedings
- booktitle
- VLSI Circuits
- year
- 2018
- pages
- 99-100
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- IEEE
- crossref
- conf/vlsic/2018
- ee
- https://doi.org/10.1109/VLSIC.2018.8502306
- isbn
- 978-1-5386-4214-6
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- http://dblp.uni-trier.de/db/conf/vlsic/vlsic2018.html#VazVECMBCWMMLPT18
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%1 conf/vlsic/VazVECMBCWMMLPT18
%A Vaz, Bruno
%A Verbruggen, Bob
%A Erdmann, Christophe
%A Collins, Diarmuid
%A McGrath, John
%A Boumaalif, Ali
%A Cullen, Edward
%A Walsh, Darragh
%A Morgado, Alonso
%A Mesadri, Conrado
%A Long, Brian
%A Pathepuram, Rajitha
%A Torre, Ronnie De La
%A Manlapat, Alvin
%A Karyotis, Georgios
%A Tsaliagos, Dimitris
%A Lynch, Patrick
%A Lim, Peng
%A Breathnach, Daire
%A Farley, Brendan
%B VLSI Circuits
%D 2018
%I IEEE
%K dblp
%P 99-100
%T A 13Bit 5GS/S ADC with Time-Interleaved Chopping Calibration in 16NM FinFET.
%U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2018.html#VazVECMBCWMMLPT18
%@ 978-1-5386-4214-6
@inproceedings{conf/vlsic/VazVECMBCWMMLPT18,
added-at = {2018-10-30T00:00:00.000+0100},
author = {Vaz, Bruno and Verbruggen, Bob and Erdmann, Christophe and Collins, Diarmuid and McGrath, John and Boumaalif, Ali and Cullen, Edward and Walsh, Darragh and Morgado, Alonso and Mesadri, Conrado and Long, Brian and Pathepuram, Rajitha and Torre, Ronnie De La and Manlapat, Alvin and Karyotis, Georgios and Tsaliagos, Dimitris and Lynch, Patrick and Lim, Peng and Breathnach, Daire and Farley, Brendan},
biburl = {https://www.bibsonomy.org/bibtex/2ddb600d5a0099dc832e7333ad6a8c547/dblp},
booktitle = {VLSI Circuits},
crossref = {conf/vlsic/2018},
ee = {https://doi.org/10.1109/VLSIC.2018.8502306},
interhash = {7c513f4b45f5c431f9dec0d8885477e1},
intrahash = {ddb600d5a0099dc832e7333ad6a8c547},
isbn = {978-1-5386-4214-6},
keywords = {dblp},
pages = {99-100},
publisher = {IEEE},
timestamp = {2018-10-31T11:38:16.000+0100},
title = {A 13Bit 5GS/S ADC with Time-Interleaved Chopping Calibration in 16NM FinFET.},
url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2018.html#VazVECMBCWMMLPT18},
year = 2018
}