Fine-grained dynamic voltage and frequency scaling for precise energy and performance tradeoff based on the ratio of off-chip access to on-chip computation times.
K. Choi, R. Soma, and M. Pedram. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (1):
18-28(2005)
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%0 Journal Article
%1 journals/tcad/ChoiSP05
%A Choi, Kihwan
%A Soma, Ramakrishna
%A Pedram, Massoud
%D 2005
%J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
%K dblp
%N 1
%P 18-28
%T Fine-grained dynamic voltage and frequency scaling for precise energy and performance tradeoff based on the ratio of off-chip access to on-chip computation times.
%U http://dblp.uni-trier.de/db/journals/tcad/tcad24.html#ChoiSP05
%V 24
@article{journals/tcad/ChoiSP05,
added-at = {2020-09-24T00:00:00.000+0200},
author = {Choi, Kihwan and Soma, Ramakrishna and Pedram, Massoud},
biburl = {https://www.bibsonomy.org/bibtex/282963250c1a6106bdf5a9cc7a07f94fb/dblp},
ee = {https://doi.org/10.1109/TCAD.2004.839485},
interhash = {814599e0310a738749853b88820f83fe},
intrahash = {82963250c1a6106bdf5a9cc7a07f94fb},
journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.},
keywords = {dblp},
number = 1,
pages = {18-28},
timestamp = {2020-09-25T11:48:22.000+0200},
title = {Fine-grained dynamic voltage and frequency scaling for precise energy and performance tradeoff based on the ratio of off-chip access to on-chip computation times.},
url = {http://dblp.uni-trier.de/db/journals/tcad/tcad24.html#ChoiSP05},
volume = 24,
year = 2005
}
